The manufacturing of electronic and optoelectronic integrated circuits (ICs) involves complex lithographic processes to form microscopic solid-state devices and circuits in semiconductor wafers. These lithographic processes typically include forming layers of material on the wafer, patterning the layers, doping the substrate and/or the patterned layers, and heat-treating (e.g., annealing) the resulting structures. These processes are repeated to build up the IC structure. The result is a wafer containing a large number of ICs.
A “wafer sort” is then performed, wherein each IC chip on the wafer is electrically tested for functionality. The wafer is then separated (“diced”) into the individual IC chips, which are then “packaged” individually or in groups for incorporation onto a printed circuit board (PCB) or a chip-on-board (COB).
An IC package is designed to provide physical and environmental protection for one or more IC chips, and electrical and/or optical interconnections with other IC chips or to a PCB. However, the typical IC chip has electrical leads with a periodic spacing (pitch) on the order of a hundred microns, whereas a PCB has an electrical contact pitch on the order of a millimeter or so. Thus, when interfacing an IC chip to a PCB, a substrate package that performs the necessary spatial transformation between the IC chip leads and the PCB contacts is often used.
As ICs have found more applications, the need for special package designs has increased. In particular, the development of optoelectronic ICs with semiconductor light sources in the form of light-emitting diodes (LEDs), semiconductor lasers and vertical-cavity surface emitting lasers (VCSELs), has lead to a need for standardized, low-cost “optoelectrical” IC package that can accommodate both electrical and optoelectronic IC chips.
Presently, optoelectronic and electrical chips are combined in a single “optoelectrical” substrate package using specialized designs and techniques tailored to the individual chips being packaged. This approach may be suitable for limited applications involving a small number of optoelectrical packages. However, it is not a cost-effective or practical approach when packaging optoelectronic and electrical chips in the large numbers associated with large-scale manufacturing. Further, to maintain cost-effectiveness, it is important that the package and packaging process be compatible with conventional PCBs and other parts commonly used in the electronics industry.
What is needed is a cost-effective optoelectronic package for electronic and optoelectronic IC chips that provides both optical and electrical functionality while being compatible with conventional PCBs.